Advanced packaging
Techniques att integrera flera chiplets på samma substrate eller stacka dem 3D. CoWoS (TSMC), Foveros (Intel), EMIB (Intel), SoIC (3D stacking). Bottleneck för AI-chip production 2024-2025.
CoWoS (Chip-on-Wafer-on-Substrate): silicon-interposer mellan chip + substrate, high-density-interconnects. Used för H100, MI300X. Foveros: 3D-stacking — Intel Meteor Lake. EMIB: silicon-bridge mellan chiplets utan full interposer (cheaper). TSMC CoWoS-capacity sold-out 2024 → Nvidia AI-chip supply-constrained (not by silicon, by packaging). Capex-explosion: TSMC investing $30B+ i new CoWoS facilities. Modern: ChiP-on-Substrate (CoS), Sintered-die-stacking, hybrid-bonding. Future: backside-power-delivery (Intel 18A) is next packaging revolution.