Interrupt controller
The chip that gathers every interrupt line, ranks them, and tells the CPU which one to deal with first.
A processor rarely has more than one or two interrupt inputs, while a system has dozens of sources: timers, UARTs, network cards, disks. The interrupt controller sits in between, masking, prioritising and handing over a vector number so the right handler gets called.
Intel's 8259 PIC from the 1970s had eight inputs; the IBM PC/AT cascaded two of them for 15, a limit that gave PC hardware two decades of IRQ conflicts. Multi-core x86 replaced it with the APIC, where every core has a local unit and an I/O APIC distributes external interrupts. ARM application processors use the GIC, RISC-V has the PLIC, and Cortex-M microcontrollers build the NVIC straight into the core.