Boundary scan
A test method in which a shift-register chain wrapped around every pin of a chip lets you read and drive a board's traces without touching them.
This is what JTAG was actually invented for. The Joint Test Action Group formed in 1985, when surface-mount packages made it impossible to reach every pin with a bed of nails, and IEEE 1149.1 followed in 1990. A boundary-scan cell sits between the core logic and each pin, and the cells are chained together. With the EXTEST instruction you shift a pattern in, drive it onto the pins, and read back what the neighbouring chips see.
That's how cold joints and shorts get found under BGA packages, where no probe can reach. Each chip ships with a BSDL file describing the length and order of its chain. The fact that the same port became the standard way to debug and dump firmware was a side effect — one that security researchers remain grateful for.