Tightly coupled memory (TCM)
A small, fast block of SRAM wired straight to the processor core, with no cache or bus in between, so access time never varies.
A cache is fast on average, but a real-time system cares about the worst case — and a cache miss in the middle of an interrupt handler shows. TCM is ARM's answer: a couple of memory blocks on a dedicated port next to the core, one for instructions (ITCM) and one for data (DTCM), read with zero wait states every single time. It appeared in the ARM9E cores around the turn of the millennium; the Nintendo DS had ITCM and DTCM in its ARM946E-S. Today it is found in Cortex-R and Cortex-M7.
The memory is small, typically a few dozen kilobytes, and reserved for what has to be predictable: interrupt handlers, tight signal-processing loops and the stack. Placement is done in the linker script with dedicated sections, and the startup code must copy the code there from flash before it runs — a step that is easy to forget until the program jumps to an address full of zeros.