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Semihosting

Hardware På svenska → Updated: 2026-11-02

An ARM mechanism that lets firmware borrow the host PC's console and file system through the debug probe, so printf works on a chip with no screen.

The program puts an operation code and a pointer into two registers and executes a special breakpoint instruction (BKPT 0xAB on Cortex-M). The debugger halts the core, reads what is being asked — print this string, open this file — does it on the PC, drops the result in a register and lets the processor go again. No UART, no extra pins.

It is also painfully slow, since every call stops the CPU, and it has a famous trap: with no debugger attached nobody catches the breakpoint, and it becomes a HardFault. Forget to rebuild without semihosting and you ship a product that only works on your desk. ITM over SWO and Segger's RTT do the same job without halting the core.

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