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HardFault

Hardware På svenska → Updated: 2026-11-02

Cortex-M's catch-all exception for serious errors — the firmware equivalent of a segfault, minus an operating system to print anything.

It is exception number 3 in the vector table. On Cortex-M0 it is the only fault exception; from M3 upward there are finer-grained ones — MemManage, BusFault, UsageFault — which escalate to HardFault unless enabled, and by default they are not. Usual suspects are stack overflow, unaligned access, a write to flash, a call through a corrupted function pointer, or a forgotten semihosting breakpoint.

A nice wrinkle: dereferencing a null pointer for reading rarely crashes, because address 0 is flash and the vector table lives there. The default handler is an infinite loop. Anyone who writes a real one reads the CFSR and HFSR status registers and pulls the program counter off the stack frame the hardware saved — it names the exact instruction that fell over.

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