Register renaming
The technique of mapping the few architectural registers the instruction set exposes (e.g. 16 in x86-64) to a much larger pool of physical registers. It eliminates "false" data dependencies and is a prerequisite for out-of-order execution to work well.
Problem: programs reuse the same few registers over and over, which creates false dependencies (WAR and WAW) — two instructions that just happen to write to the same register name appear to depend on each other when they don't logically. That would needlessly serialize them. Register renaming solves it: each time a register is written it's assigned a new physical register from the pool (hundreds of physical registers behind the few architectural ones) → the false dependencies disappear and the instructions can run in parallel/out of order. Only the true dependencies (RAW — read after write) remain. This is the core of why modern cores can extract so much parallelism. Classic technique: Tomasulo's algorithm. Tightly interwoven with the register file and the reorder buffer. An indispensable part of the out-of-order machinery. Related to data hazard and register file.