Process node
The designation of a chip manufacturing process, traditionally given in nanometers ("5 nm", "3 nm"). Nowadays the number is mostly a marketing name — it no longer corresponds to any physical transistor size but roughly to a "generation" of density and performance.
History: the nm figure used to roughly correspond to the gate length; today "5 nm" is a label, and manufacturers' nodes with the same name differ greatly (Intel "10nm" ≈ TSMC "7nm" in density, which led Intel to rename its nodes). What actually matters: transistor density (millions of transistors/mm²), performance per watt, and yield. Three leading foundries: TSMC, Samsung, Intel. Comparing nodes purely on the nm name is misleading. The transition to the "angstrom era" (Intel 18A = ~1.8 nm class) continues the trend that the name ≠ the measurement. Related to die shrink and EUV.