Output compare
A timer feature that compares the counter against a register and, on a match, changes a pin or raises an interrupt — with no CPU involvement.
A hardware timer counts up on every clock tick. Output compare adds a comparison register alongside it: when the counter hits that value, the timer can set, clear or toggle an output pin, and optionally fire an interrupt. The timing is decided by a comparator in silicon, not by whenever an interrupt handler happens to get scheduled.
It is the mirror image of input capture, and the two usually share a channel and a register (CCR on STM32). One compare match per period to flip the pin, plus the counter rollover to flip it back, is essentially all PWM is. The same mechanism drives stepper motors, generates servo pulses and times ADC sampling. Anyone who tries the same thing with a GPIO and a delay loop learns quickly what jitter means.