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NMI (non-maskable interrupt)

Hardware På svenska → Updated: 2026-11-03

An interrupt the processor cannot switch off — it gets through even when every other interrupt is disabled.

Ordinary interrupts can be masked: code turns them off around a critical section and takes them afterwards. An NMI has no such switch. That makes it the channel for events more important than whatever the program happens to be doing — a memory parity error, a watchdog firing, a power supply about to give out.

The idea is old. The 6502 had a dedicated NMI pin, which the NES used to wake the game at every vertical blank. On x86, early PCs reported memory errors through it, and Linux still uses it for the "NMI watchdog" that catches a locked-up core. On Cortex-M, NMI is exception number 2 with a fixed priority of −2; only reset outranks it.

The catch is that an NMI handler can land in the middle of anything, including code that believed it was protected. So it has to be short, and it must never take a lock.

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