Heterogeneous cores
A CPU design where different core types with different strengths exist on the same chip — typically a few large performance cores and several small efficient ones. The scheduler places each task on the most suitable core type. Now standard in almost all processors, from mobile to desktop.
Principle: instead of many identical cores (homogeneous) you mix core types to get the best of several worlds — large cores for latency-sensitive, heavy tasks; small ones for background, parallel throughput, and idle (lowest energy). Examples: ARM big.LITTLE (mobile), Intel P-cores + E-cores (Alder Lake onward), Apple's M-series (Performance + Efficiency). Driver: dark silicon (you don't have the power to drive everything large at once) and the need for both battery life and peak performance. The challenge: the scheduler must decide which thread belongs where (a background thread on a large core wastes energy; a gaming thread on a small core loses performance) — which requires help from the hardware (Intel's Thread Director). A defining trend in modern CPU design. Related to big.LITTLE and Thread Director.