DMA descriptor
A small structure in memory describing one transfer — source, destination, length and where the next descriptor lives — so the DMA controller can work through a whole chain on its own.
A simple DMA channel is programmed through registers: address, count, go. That's enough for one buffer. For several, or for data scattered across memory, you lay out descriptors in RAM and hand the controller the address of the first. It reads it, performs the transfer, follows the next pointer and carries on. That's how scatter-gather works in practice, and a ring of descriptors gives the effect of circular DMA with as many buffers as you like.
Network cards took the idea furthest. Their descriptor rings carry an ownership bit saying whether an entry belongs to the driver or the hardware. The classic bug lives in the cache: the CPU writes a descriptor that stays in L1, the controller reads stale RAM, and the result looks like a hardware fault. It rarely is. It's cache maintenance.