Backside power delivery
Routing power to the transistors through the back of the silicon instead of squeezing it in among the signal wires on top. One of the few remaining ways to win performance without shrinking anything.
In a conventional chip both power delivery and signalling live in the same stack of metal layers above the transistors, competing for room. Power rails must be wide to avoid losing voltage, signals want to be dense, and the compromise costs both clock frequency and area. The fix is to thin the wafer from behind and build a dedicated power network down there, connected by through-silicon vias. Voltage droop falls, the front side gets room for denser logic, and the manufacturers quote something like six percent higher frequency plus measurably better density. Intel shipped first with PowerVia on 18A; TSMC's equivalent arrives with A16.