QSPI (Quad SPI)
An SPI variant with four bidirectional data lines instead of one, used mainly to attach external NOR flash to microcontrollers.
Plain SPI moves one bit per clock in each direction. QSPI repurposes the pins: MOSI, MISO and two formerly spare lines become IO0–IO3 and carry four bits per cycle, one direction at a time. Modes are written as 1-1-4, 1-4-4 or 4-4-4 — the number of lines used for command, address and data respectively. With DDR, sampling on both clock edges, the rate doubles again.
The real point is memory-mapped mode. The controller inside the microcontroller turns ordinary reads in the address space into QSPI transactions, so code can execute straight from external flash. The Raspberry Pi Pico and most ESP32 modules work this way. Each cache miss still costs dozens of cycles, though, and the hunger for bandwidth has already spawned Octal SPI and HyperBus.