Prescaler
A frequency divider in front of a timer or peripheral that slows the clock down to something the counter can handle without overflowing immediately.
A 16-bit timer fed straight from 72 MHz wraps around more than 1,000 times a second, which is too fast for most purposes. The prescaler divides the clock first: divide by 7,200 and the counter ticks at 10 kHz, able to measure up to 6.5 seconds. On STM32 you write PSC, and the actual division is the register value plus one — a perennial source of off-by-one timing bugs. Older AVR chips offer only fixed steps: 1, 8, 64, 256 and 1024.
The choice trades resolution for range. A small divider gives fine time steps but short intervals; a large one the reverse. The same idea turns up in the UART's baud generator and the ADC clock.