Place and route
The step that turns a logical netlist into actual geometry: where each cell sits on the silicon and how the wires between them are run.
After synthesis there is a list of hundreds of millions of standard cells and what connects to what, but no physical information at all. Placement decides coordinates; routing runs metal through a dozen or more layers. The requirements that must hold simultaneously pull in different directions: the signal has to arrive within the clock period, no region may contain more wires than physically fit, power has to stay within budget, and the process design rules must be obeyed everywhere. Because wire delay dominates at small nodes the steps can no longer be done in sequence — the tools iterate between them, and a large block can take days to run through.