IT lexicon › Hardware › Low-power modes

Low-power modes

Hardware På svenska → Updated: 2026-11-03

A microcontroller's staircase of sleep levels, where each step down saves current and lengthens the way back up.

On Cortex-M the WFI instruction stops the core clock until an interrupt arrives; with the SLEEPDEEP bit set, most peripherals go dark too. Vendors stack their own levels on top. STM32 calls them Sleep, Stop and Standby: Stop keeps RAM but shuts down the main oscillator, Standby loses almost everything except the real-time clock and a few backup registers. Current drops from milliamps to a fraction of a microamp.

The bill arrives at wake-up. From the deepest level it is effectively a reset, so the program runs through the startup code again and has to work out from the backup registers that this is not an ordinary power-on. The debugger also tends to lose its connection, which makes bugs in sleep code a genre of their own.

← Back to the lexicon