cJTAG (IEEE 1149.7)
A slimmed-down JTAG that gets by on two pins instead of four or five.
Classic JTAG needs TCK, TMS, TDI and TDO, and devices are daisy-chained so a single broken link takes the rest down. IEEE 1149.7, from 2009, multiplexes data and control onto one bidirectional wire, TMSC, alongside the clock TCKC. It also allows a star topology, so several devices can sit in parallel on the same two wires and be addressed individually.
It is backwards compatible: a cJTAG device boots in plain JTAG mode and only switches when the debugger asks. The standard is unusually long and defines six classes of ambition, which may explain why ARM's own two-wire answer, SWD, won the Cortex-M world. cJTAG survives mainly at TI and in some RISC-V parts.